1. Field of the Invention
The invention relates to a method for fabricating semiconductor device, and more particularly, to a method of eliminating dislocations in epitaxial layer.
2. Description of the Prior Art
In order to increase the carrier mobility of semiconductor structure, it has been widely used to apply tensile stress or compressive stress to a gate channel. For instance, if a compressive stress were to be applied, it has been common in the conventional art to use selective epitaxial growth (SEG) technique to form epitaxial structure such as silicon germanium (SiGe) epitaxial layer in a silicon substrate. As the lattice constant of the SiGe epitaxial layer is greater than the lattice constant of the silicon substrate thereby producing stress to the channel region of PMOS transistor, the carrier mobility is increased in the channel region and speed of MOS transistor is improved accordingly. Conversely, silicon carbide (SiC) epitaxial layer could be formed in silicon substrate to produce tensile stress for gate channel of NMOS transistor.
Conventionally, dislocations are easily formed during the formation of epitaxial layer through epitaxial growth processes, and accumulation of dislocations will often result in much more serious linear dislocations and affect optical and electrical performance of a material. Hence, how to improve the current fabrication to resolve this issue has become an important task in this field.